HW Future Systems Performance Modeling, IBM Corporation, Austin, Texas: Lead micro-architectural performance improvements. Advise designers on translation of architecture decisions. Define methods to extract insights from data generated by modelling team. Model and suggest solutions for future instruction cache designs. Oversee ideation, design, and implementation of new performance analysis tools. Provide guidance and support while establishing troubleshooting procedures for any unforeseen anomalies. Perform frequent retrospectives aimed at improving the quality of team skills, process, and tools to achieve higher performance. Utilize Hardware Description Languages (HDLs), Queuing Languages, Programming Languages (C, C++, Python), computer architecture, simultaneous multi-threading, caching, branch prediction, performance analysis and automation, and experiment design.

Required: P.H.D degree or equivalent in Engineering or related and (1) one year of experience as an Advisory Engineer or related. One (1) year of experience must include utilizing Hardware Description Languages (HDLs), Queuing Languages, Programming Languages (C, C++, Python), computer architecture, simultaneous multi-threading, caching, branch prediction, performance analysis and automation, and experiment design.