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Cupertino, CA Apple Inc.

Apple Inc. has multiple positions available in Cupertino, CA:
Human Interface Designer (REQ#9H6VD4) Dsgn, prototype & dev SW for Apple’s current & future OS.
Hardware Development Engineer (REQ#A2EVA5) Dsgn, dev, & launch nxt gen Snsor TechnlgIes in Apl prdcts. Travel req. 20%.
Software Engineer Applications (REQ#B265S6) Rspn for mkng busnss apps work in cross devce & cross brwsrs.
ASIC Design Engineer (REQ#APG6WE) Dsgn, dev, and intgrte USB digital HW for SoC ASICs.
Hardware Development Manager (REQ#A2EV6Q) Dsgn, dvlp, & launch next-gen sensor tech in Apple products. Travel req. 20%.
ASIC Design Engineer (REQ#AKZ25W) Perf Statc Timng Anlysis for the ASIC chips for Apple Dev’ed SoCs.
Reliability Engineer (REQ#ASX48H) Dev reliability tests to enable new tech & user interactions. Travel req. 20%.
ASIC Design Engineer (REQ#AS4TU9) Dsgn & dev CPUs as prt of the SoCs for moble HW devices.
ASIC Design Engineer (REQ#AS436Q) Rspnsble for the vrfction of mltple intlctual prprty blocks on Apple’s Systm-on-a-chp (SoC) hrdwr dsgns.
ASIC Design Engineer (REQ#ANS8YT) Implmnt cmplx, hi-perf & low pwr units of microprcssr (CPU) involvng gate-lvl logic dsgn, HDL synthsis & plce-&-route (P&R).
Hardware Development Engineer (REQ#ABSVAD) Process technology feasibility studies through theoretical simulation and practical engineering methods. Travel Req 20%.
ASIC Design Engineer (REQ#AA5SNM) Resp for the PHY dsgn effrt intrfcng with archtctre, CAD, timng & lgic dsgn teams, with a crtcal impct on delvring best in PHY dsgn.
Software Development Engineer (REQ#AMDMFL) Design & dvlp cellular sw features.
Software Development Engineer (REQ#ALEUHX) Dsgn, dev & configure networking sys hw & sw.
ASIC Design Engineer (REQ#ASBVA8) Crte sw to vrify archt. & fnctinlty of pre-slicn hw dsgns.
ASIC Design Engineer (REQ#9TH2GR) Rspn for pwr gatng implmntatn for mobile SOCs.
ASIC Design Engineer (REQ#ARU8AG) Spprt FPGA-based prtotypng syst for sw brngup & vrfcation/vldtion tasks.
Alliance Marketing Specialist (REQ#9K6SUR) Provide asst w/ creating vision & asst w/ ops for delivring scaled dvlpr gudnce on the App Store Mrkting Team inclding contnt strtgy, roadmap, & oprtnal elmnts.
Senior Research Engineer (REQ#APE5FV) Anlyze new publicatns in the fld of mach learning & artificl intelligence.
ASIC Design Engineer (REQ#A7V8YB) Dsgn, simulate, & chracterize custom Intgrated Crcuits.
Senior Business Manager (REQ#ABYVXS) Supp & prtnr with lrg merchants to deploy Apple Pay as a chckout method on eCommerce apps and web sites. Travel req. 25%.
Engineering Program Specialist (REQ#9T9P3F) Resp for Apple’s stratgc prdct & feature set in the comp vsn spce.
Engineering Project Specialist (REQ#ARV4AX) Prfrm mtric & data detailed anlysis to undrstnd prcess dficiencies.
ASIC Design Verification Engineer (REQ#AR72EW) Resp for the verif of mltple intllctual prprty blocks on Apple’s System-on-a-Chip (SoC) HW dsgns.
Software Development Engineer (REQ#AS8225) Desgn, enhnce & maintain WiFi netwrkng subsystm sftwre acrss a range of Apple prodcts includng iPhone, iPad, iPod Touch & Apple TV.
iCloud Engineering Manager (REQ#9NTU2T) Defne roadmps & upcmng feats fr bth areas of rspnsblty.
Engineering Project Specialist (REQ#ARL26V) Respnsble for eCommerce SW devlpment projct logstcs includng planning, reportng, resourcing & budgtng.
Engineering Project Specialist (REQ#AX64VK) Coordinate project plans & schedules w/ engineers & drive project execution.
Software Development Engineer (REQ#APANCR) Review & analyze on a daily basis prfrmnce regression automated test results.
Software Engineer Applications (REQ#9UB6BU) Dsgn & dev user intrfce SW for the Phone & FaceTime prdcts at Apple.
Environmental Program Engineer (REQ#ABUV4R) Collaborate w/ teams on power supply design & electrical sys.
Refer to Req# & mail resume to Apple Inc., ATTN: D.W., 1 Infinite Loop 104-1GM, Cupertino, CA 95014. Apple is an EOE/AA m/f/disability/vets.

Apple Inc. has multiple positions available in Cupertino, CA:
Product Marketing Specialist (REQ#9TPSFH2ND) Wrk with a glbl crss-functnl team to rsrch mrkt cndtns in local, regnl, & natnl areas & defne iPhone HW & SW fetures. Travel required 20%.
ASIC Design Engineer (REQ#ADZ4J9) Dsgn, implmnt, & review custom dgitl circuits for memories & latch arrays.
Systems Design Engineer (REQ#A4CVVE) Dsgn & dev intrnl SW tools & systms for Wrelss Dsgn (HW Eng) dept at Apple.
ASIC Design Engineer (REQ#9UB6AV) Prfrm vrious types of physcl vrifction chcks (such as LVS, DRC, dsgn-for-mnufctrng & dsgn-for-yield, & lithogrphy) at the chip & blck lvl.
Software Quality Assurance Engineer (REQ#AWX5RX) Devlp qualty procsses used to measre Apple Maps qualty. Travel req. 20%.
Software Engineer Applications (REQ#9TH2MA) Dsgn, devlop, implment, maintain & oprate lrg scale distrbutd systms.

Apple is an EOE/AA m/f/disability/vets.
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