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Principal Dsp Design Engineer

Irvine, CA Confidential

Engineer Principal DSP Design Engineer Principal DSP Design Engineer: In the R&D context for ASIC development, work w/system designers on implementation of communication systems modems, MAC & digital frontend algorithms in RTL. Implement security & error correcting cores. Propose efficient architectures & implementation to optimize chip area & power consumption. Perform running block & chip level simulations of developed hardware. Take development through FPGA flows to synthesize code on FPGA, program it & debug it. Help w/testing system functionality & performance. Debug performance issues w/systems, hardware & software teams. Exercise judgement in performing tasks. Provide guidance to junior engineers. Use Verilog, VHDL, Matlab, C/C++, digital design and simulation tools to perform duties. Send CV to job location: Goodix Technology Inc 133 Technology Dr Ste 200 Irvine CA 92618.
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