HW Future Systems Performance Modeling Architect
IBM Corporation, Austin, TX: Lead data prefetch design for future POWER processors. Advise designers for translation of architecture decisions. Define methods to extract insights from data generated by modeling team. Model and suggest solutions for future L2/L3 cache designs. Oversee ideation, design and implementation of new performance analysis tools. Provide guidance, support and establish troubleshooting procedures for any unforeseen anomalies. Perform frequent retrospectives aimed at improving the quality of team skills, process and tools to achieve higher performance. Utilize Programming Languages (Python, C, C++), computer architecture, simultaneous multi threading, data prefetching, performance analysis and automation and experiment design. Required: Master’s degree or equivalent in Engineering or related (employer will accept a Bachelor’s degree plus five (5) years of progressive experience in lieu of a Master’s degree) and one (1) year of experience as an Advisory Engineer or related. One (1) year of experience must include utilizing Programming Languages (Python, C, C++), computer architecture, simultaneous multithreading, data prefetching, performance analysis and automation and experiment design.
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